Semiconductor sawing method and system
US10703016B2 · kind B2 · utility
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1References
26Claims
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Key dates
| Filing date | Jun 20, 2018 |
| Grant date | Jul 7, 2020 |
| Priority date | — |
| Expiry date | Jan 3, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2221/68327
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In one instance, a method of manufacturing an integrated circuit includes a method for dicing a semiconductor wafer that includes disposing the semiconductor wafer on a moveable cutting table, cutting the semiconductor wafer, and ejecting a clearing fluid across an exposed side of the semiconductor wafer, with full coverage across the semiconductor wafer, at least during the cutting of the semiconductor wafer. The ejecting clearing fluid is ejected to form a layer or membrane of fluid that clears or reduces other fluids from the exposed side or surface of the semiconductor wafer. Other aspects are presented.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.