Analog circuit fault mode classification method
US10706332B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 24, 2015 |
| Grant date | Jul 7, 2020 |
| Priority date | — |
| Expiry date | Aug 18, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2218/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An analog circuit fault mode classification method comprises the following implementation steps: (1) collecting M groups of voltage signal sample vectors Vij to each of fault modes Fi of the analog circuit by using a data collection board; (2) sequentially extracting fault characteristic vectors VijF of the voltage signal sample vectors Vij by using subspace projection; (3) standardizing the extracted fault characteristic vectors VijF to obtain standardized fault characteristic vectors; (4) constructing a fault mode classifier based on a support vector machine, inputting the standardized fault characteristic vectors, performing learning and training on the classifier, and determining structure parameters of the classifier; and (5) completing determination of fault modes according to fault mode determination rules. The fault mode classifier of the present invention is simple in learning and training and reliable in mode classification accuracy.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.