Shift register unit circuit, driving method thereof, gate drive circuit and display device
US10706767B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Aug 31, 2017 |
| Grant date | Jul 7, 2020 |
| Priority date | — |
| Expiry date | Jan 9, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/08
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A shift register unit circuit includes an input circuit configured to supply an active potential to a first node responsive to an input pulse from an input terminal being active and to supply an inactive potential to the first node responsive to a reset pulse from a reset terminal being active; an output circuit configured to supply a first clock signal to an output terminal responsive to a second node being at the active potential and to cause a potential at the second node to be changed from the active potential to further away from the inactive potential responsive to a transition of a potential at the output terminal transitioning from the inactive potential to the active potential; and a potential control circuit configured to restrict a change in the potential at the first node caused by the transition of the potential at the output terminal from the inactive potential to the active potential.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.