Memory device
US10706920B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 10, 2018 |
| Grant date | Jul 7, 2020 |
| Priority date | — |
| Expiry date | Aug 10, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/76
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device includes: a memory cell array including a plurality of memory cells, wherein each of the plurality of memory cells includes a switching element, and a data storage element connected to the switching element, wherein the data storage element includes a phase change material; and a memory controller configured to perform a control operation with respect to a first memory cell of the plurality of memory cells by inputting an operating current to the first memory cell, and inputting a compensation current flowing from the data storage element to the switching element in the first memory cell before or after inputting the operating current to the first memory cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.