Method of manufacturing laminated electronic component
US10707016B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 21, 2017 |
| Grant date | Jul 7, 2020 |
| Priority date | — |
| Expiry date | Mar 14, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K3/4629
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a laminated electronic component having a circuit element formed in an element body. The method includes forming a collective laminated body including a plurality of element bodies having circuit elements formed therein by laminating pluralities of insulator layers and conductor patterns; forming a plurality of external terminals on one of surfaces of the collective laminated body orthogonal to a lamination direction; forming a disappearing layer covering the external terminals and caused to disappear by heat treatment; cutting and dividing the collective laminated body having the disappearing layer formed thereon along the lamination direction into each of element bodies; applying an insulator precursor to a surface of the element body; and forming a laminated electronic component by applying a heat treatment to the element body to which the insulator precursor is applied. In the method, the insulator layers can be replaced by magnetic material layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.