Array substrate and display panel
US10707241B2 · kind B2 · utility
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1References
16Claims
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Key dates
| Filing date | Oct 3, 2018 |
| Grant date | Jul 7, 2020 |
| Priority date | — |
| Expiry date | Oct 3, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/83851
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An array substrate having a substrate witha bonding region on one side, the bonding region having a plurality of bonding pads arranged in order, where at least one dummy pad is provided in a first position of the bonding pads. The at least one dummy pad is used for dividing the bonding region into a plurality of bonding sub-regions, where each bonding sub-region has a plurality of bonding pads. This disclosure further provides a display panel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.