High-Q dispersion-compensated parallel-plate diplexer
US10707550B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 28, 2018 |
| Grant date | Jul 7, 2020 |
| Priority date | — |
| Expiry date | Oct 9, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H11/34
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A parallel-plate diplexer includes a first parallel-plate transmission line and a second parallel-plate transmission line, a first end of the second parallel-plate transmission line including a first port and a second end of the second parallel-plate transmission line including a second port, and a first end of the first parallel-plate transmission line including a third port and a second end of the first parallel-plate transmission line being coupled to the second parallel-plate transmission line at a T-junction between the first port and the second port. The second parallel-plate transmission line includes a first parallel-plate transmission line tuning network located between the T-junction and the first port, and a second parallel-plate transmission line tuning network located between the T-junction and the second port.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.