Memresistive security hash function
US10708041B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 29, 2018 |
| Grant date | Jul 7, 2020 |
| Priority date | — |
| Expiry date | Jan 2, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2013/0042
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Apparatus and method for hashing a message, comprises using an array of individually selectable memristor cells. The memristor cells are subject to write disturb that affects cells neighboring a selected cell so that a write operation into one cell has a knock-on effect on the neighbors. The array is initiated into a known stable state so that these changes to neighboring cells are predictable according to proximity to the currently selected cell. An inserter sequentially mixes bits with the hash so far to insert bits into successively selected cells of the memristor array and forms a succession of memristor array states including the knock on effects on the neighboring cells. A final resulting memristor array state following input of the bits forms the hash of the message.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.