Polishing compositions
US10711159B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 27, 2017 |
| Grant date | Jul 14, 2020 |
| Priority date | — |
| Expiry date | Dec 27, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/7684
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure provides chemical mechanical polishing compositions that achieve minimal dishing at reduced dishing reducer (DR) levels when compared to known CMP compositions. The compositions of the disclosure include a dynamic surface tension reducer (DSTR) which allows for lower levels of dishing reducer in the compositions. Indeed, the compositions of the disclosure allow for lower levels of dishing reducer to achieve the same dishing as known compositions having higher levels of dishing reducer. Deleterious effects of high DR levels are thereby avoided or minimized when employing the compositions of the disclosure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.