Virtual processor enabling real-time in situ disassembly and debugging in SoC environment
US10713144B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 15, 2017 |
| Grant date | Jul 14, 2020 |
| Priority date | — |
| Expiry date | Feb 13, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2115/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The example embodiments are directed to a system and method for a virtual processor that enables real-time in situ disassembly and debugging. In one example, the method includes implementing a virtual processor in field programmable gate array (FPGA) programmable logic, the virtual processor comprising a virtual version of a target system, capturing data representative of operations in the virtual processor using a bus access device configured to provide direct access to components of the virtual processor, streaming the data to the embedded processor, storing the data in the memory device, and performing in-situ disassembly and debugging.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.