Storage system and method for improving read performance using multiple copies of a logical-to-physical address table
US10713157B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 31, 2018 |
| Grant date | Jul 14, 2020 |
| Priority date | — |
| Expiry date | Jul 4, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7201
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A storage system and method for improving read performance using multiple copies of a logical-to-physical address table are provided. In one embodiment, a method for parallelism is provided that is performed in a storage system comprising a plurality of memory areas accessible in parallel, wherein each memory area stores a copy of a logical-to-physical address table. The method comprises reading portions of the logical-to-physical address tables in parallel from the plurality of memory areas, wherein the portions comprise translations for logical addresses associated with a plurality of memory commands; translating the logical addresses associated with the plurality of memory commands into physical addresses using the read portions; and performing the plurality of memory commands. Other embodiments are provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.