Memory control device for estimating time interval and method thereof
US10714187B2 · kind B2 · utility
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13References
18Claims
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Key dates
| Filing date | Nov 11, 2019 |
| Grant date | Jul 14, 2020 |
| Priority date | — |
| Expiry date | Nov 11, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/32
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory control device includes a memory and a controller. The memory includes a plurality of memory blocks. The controller is coupled to the memory and configured to select a first memory block from the memory blocks and program data into the first memory block. When the memory control device is deactivated and re-activated, the controller is further configured to read a voltage distribution of the first memory block to determine a deactivation interval, and determine a reference time according to the deactivation interval and an initial time, and the voltage distribution of the first memory block correspond to the data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.