Processing module for a communication device and method therefor
US10715355B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 1, 2017 |
| Grant date | Jul 14, 2020 |
| Priority date | — |
| Expiry date | Jun 1, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/0212
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A processing module for a receiver device. The processor module comprises a channel estimate generation component arranged to output channel estimate information for a received signal, and a timestamping module arranged to determine a ToA measurement for a marker within a packet of the received signal based at least partly on the channel estimate information for the received signal generated by the channel estimate generation component. The channel estimate generation component comprises a validation component arranged to derive a validation pattern for the packet within the received signal for which a ToA measurement is to be determined, identify a section of the packet containing a validation sequence, and perform cross-correlation between at least a part of the validation sequence within the packet and at least a part of the generated validation pattern to generate channel estimate validation information.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.