Piezoelectric device package
US10718672B2 · kind B2 · utility
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16Claims
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Assignee
Inventors
Key dates
| Filing date | Sep 22, 2017 |
| Grant date | Jul 21, 2020 |
| Priority date | — |
| Expiry date | Sep 8, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N30/883
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A piezoelectric device package includes a board having a lower surface and an upper surface, a plurality of terminals disposed on the lower surface, a piezoelectric device disposed on the upper surface, a thermistor layer and a resistance layer disposed on the lower surface, and a cap lead covering an upper portion of the board.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.