Reconfigurable fabric direct memory access with multiple read or write elements
US10719470B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 22, 2017 |
| Grant date | Jul 21, 2020 |
| Priority date | — |
| Expiry date | Sep 22, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4221
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques are disclosed for data manipulation. Data is obtained from a first switching element where the first switching element is controlled by a first circular buffer. Data is sent to a second switching element where the second switching element is controlled by a second circular buffer. Data is controlled by a third switching element that is controlled by a third circular buffer. The third switching element hierarchically controls the first switching element and the second switching element. Data is routed through a fourth switching element that is controlled by a fourth circular buffer. The circular buffers are statically scheduled. The obtaining data from a first switching element and the sending the data to a second switching element includes a direct memory access (DMA). The switching elements can operate as a master controller or as a slave device. The switching elements can comprise clusters within an asynchronous reconfigurable fabric.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.