Method and system for detecting hardware trojans and unintentional design flaws
US10719631B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jul 27, 2017 |
| Grant date | Jul 21, 2020 |
| Priority date | — |
| Expiry date | Jan 6, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L63/14
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure includes systems and methods relating to information flow tracking and detection of unintentional design flaws of digital devices and microprocessor systems. In general, in one implementation, a technique includes: receiving a hardware design specifying an implementation for information flow in a hardware configuration; receiving one or more labels annotating the hardware design; receiving one or more security properties specifying a restriction relating to the one or more labels for implementing an information flow model; generating the information flow model; performing verification using the information flow model, wherein verification comprises verifying whether the information flow model passes or fails against the one of more security properties; and upon verifying that the information flow model passes, determining that an unintentional design flaw is not identified in the hardware design.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.