Patent · US Active

Adiabatic logic cell

US10720924B2 · kind B2 · utility

0Cited by

3References

17Claims

0Family size

Assignee

COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES · FR

Inventors

Gaël Pillonnet · Grenoble, FR
Hervé Fanet · Castres, FR

Key dates

Filing date	Nov 4, 2019
Grant date	Jul 21, 2020
Priority date	—
Expiry date	Nov 4, 2039

Classification

Technology area (CPC H)Electricity
CPC primaryH03K19/0941
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

An adiabatic logic cell including a first MOS transistor coupling a node for applying a periodic variable supply voltage of the cell to a floating node for providing an output logic signal of the cell, wherein the first transistor is a dual-gate transistor including a front gate coupled to a node for applying an input logic signal of the cell, and a back gate coupled to a node for applying a first periodic variable bias voltage.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.