Digital emulation of an analog device with tolerance modeling
US10725727B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 31, 2016 |
| Grant date | Jul 28, 2020 |
| Priority date | — |
| Expiry date | Mar 18, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/0481
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A digital emulation of an analog device with tolerance modeling is disclosed. In operation, a model of an analog circuit is provided. The model includes the location of each individual element in the analog circuit. The model also includes a working value for each individual element as well as a tolerance range for each individual element. A randomized working value is then generated for one or more of each individual element based on the tolerance range and the working value. A digital emulation of the analog circuit is performed. The digital emulation uses the randomized working value for one or more of the each individual element and the working value for any remaining of each individual element. The digital emulation is then provided to a user for use in a digital environment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.