Supporting hang detection and data recovery in microprocessor systems
US10725848B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 7, 2018 |
| Grant date | Jul 28, 2020 |
| Priority date | — |
| Expiry date | Apr 8, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/0787
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiment of this disclosure provides a mechanism to support hang detection and data recovery in microprocessor systems. In one embodiment, a processing device comprising a processing core and a crashlog unit operatively coupled to the core is provided. An indication of an unresponsive state in an execution of a pending instruction by the core is received. Responsive to receiving the indication, a crash log comprising data from registers of at least one of: a core region, a non-core region and a controller hub associated with the processing device is produced. Thereupon, the crash log is stored in a shared memory of a power management controller (PMC) associated with the controller hub.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.