Patent · US Active

Indexing entries of a storage structure shared between multiple threads

US10725992B2 · kind B2 · utility

0Cited by

11References

16Claims

0Family size

Assignee

Arm Limited · GB

Inventors

Mitchell Bryan Hayenga · Austin, US
Curtis Glenn Dunham · Austin, US
Dam Sunwoo · Austin, US

Key dates

Filing date	Dec 3, 2018
Grant date	Jul 28, 2020
Priority date	—
Expiry date	Dec 3, 2038

Classification

Technology area (CPC G)Physics
CPC primaryG06F2212/6032
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

An apparatus has processing circuitry for processing instructions from multiple threads. A storage structure is shared between the threads and has a number of entries. Indexing circuitry generates a target index value identifying an entry of the storage structure to be accessed in response to a request from the processing circuitry specifying a requested index value corresponding to information to be accessed from the storage structure. The indexing circuitry generates the target index value as a function of the requested index value and a key value selected depending on which of the threads trigger the request. The key value for at least one of the threads is updated from time to time.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.