Method and apparatus for emulation of neuromorphic hardware including neurons and synapses connecting the neurons
US10726337B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 29, 2016 |
| Grant date | Jul 28, 2020 |
| Priority date | — |
| Expiry date | Jan 15, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N3/063
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a method for emulation of neuromorphic hardware on a computer processor, the neuromorphic hardware including computing circuits, the computing circuits including neurons and synapses connecting the neurons, the neurons being configured to communicate to each other through the synapses via spikes, the computing circuits being configured to execute in parallel in increments of time, the method includes, for each said time increment, emulating processing of the synapses, emulating processing of the neurons, and recording by the processor the next ones of the spikes for a subset of the neurons on a non-transitory physical medium. The processing of the synapses includes receiving previous ones of the spikes at presynaptic ends of the synapses, and transmitting the received previous ones of the spikes to postsynaptic ends of the synapses. The processing of the neurons includes receiving current ones of the spikes and generating next ones of the spikes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.