Reference voltage generator for resistive memory array
US10726880B2 · kind B2 · utility
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8References
18Claims
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Key dates
| Filing date | Nov 2, 2018 |
| Grant date | Jul 28, 2020 |
| Priority date | — |
| Expiry date | Nov 2, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2013/0054
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus for storing data in a magnetic random access memory (MRAM) is provided. The MRAM may store data in one or more resistance-based memory cells and may include a plurality of comparators to compare a voltage generated based on the resistance-based memory cells to a reference voltage to determine a stored logic state. In some implementations, the reference voltage may be generated by a plurality resistance-based memory cells. The reference voltage may be adjusted higher or lower by storing different logic states within the resistance-based memory cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.