Rewiring method for semiconductor
US10727112B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 28, 2017 |
| Grant date | Jul 28, 2020 |
| Priority date | — |
| Expiry date | Sep 28, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/37001
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for rewiring of semiconductor devices is provided, in which deviations of electrical connection terminals (211, 212, 221, 222, 231, 232) on a carrier (100) are calculated and corrected by forming rewiring structures on the electrical connection terminals by mask-free photolithography. A wiring layer and/or solder balls (700) is/are then formed on the rewiring structures by processing the carrier (100) in a monolithic manner using mask-based photolithography. In this way, the combined use of mask-free photolithography and mask-based photolithography allows for higher efficiency and a shorter process cycle, compared to only using mask-free photolithography.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.