Semiconductor package
US10727212B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 25, 2018 |
| Grant date | Jul 28, 2020 |
| Priority date | — |
| Expiry date | Feb 5, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/18
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes a connection structure including a first insulation layer, a second insulation layer, first and second wiring layers, and first and second connection vias. A core structure including a core member is on the first insulation layer. A first through-hole passes through the core member. Passive components are on the first insulation layer in the first through-hole and connected to the first wiring layer through the first connection via. A first encapsulant covers at least a portion of the passive components. A second through-hole passes through the core structure and the first insulation layer. A semiconductor chip is on the second insulation layer in the second through-hole and is connected to the second wiring layer through the second connection via. A second encapsulant covers at least a portion of the semiconductor chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.