ESD protection device, semiconductor device that includes an ESD protection device, and method of manufacturing same
US10727221B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 27, 2019 |
| Grant date | Jul 28, 2020 |
| Priority date | — |
| Expiry date | Feb 27, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D18/221
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An ESD protection device for protecting an integrated circuit against an ESD event includes a first terminal coupled to an input/output pad of the IC, a second terminal coupled to a reference or ground voltage, a silicon-controlled rectifier device having an anode connected to the first terminal and a cathode connected to the reference or ground voltage, and a pnp transistor coupled in parallel with the SCR device. The pnp transistor has an emitter coupled to the first terminal, a collector coupled to the second terminal, and a base coupled to a gate of the SCR. The pnp transistor includes a contact region formed at a first side of a substrate, the first contact region being surrounded by an STI layer formed at the first side of the substrate. An insulation structure is formed at an intersection of the first contact region and the STI layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.