DAC calibration using VCO ADC
US10727853B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 6, 2019 |
| Grant date | Jul 28, 2020 |
| Priority date | — |
| Expiry date | Jun 6, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/742
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A DAC has a plurality DAC cells, and timing mismatch among the DAC cells can introduce errors in an output of a DAC. An efficient technique can be implemented to extract the timing error of a DAC cell. The technique involves a mixer to mix the timing error to DC (DC stands for direct current, where signal frequency is zero) and a VCO ADC to observe the output of the DAC cell to measure and extract the timing error. A first measurement is made using a first quadrature phase signal and a second measurement is made using a second quadrature phase signal. A difference between the first measurement and the second measurement yields the timing error of the DAC cell. Advantageously, the mixer can be integrated within a voltage-to-current converter of the VCO ADC. The timing error can be corrected in the digital domain or analog domain.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.