Methods and apparatus for performing a high speed phase demodulation scheme using a low bandwidth phase-lock loop
US10728068B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 3, 2018 |
| Grant date | Jul 28, 2020 |
| Priority date | — |
| Expiry date | Jan 3, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/0087
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Methods and apparatus for performing a high speed phase demodulation scheme using a low bandwidth phase-lock loop are disclosed. An example apparatus includes a low bandwidth phase lock loop to lock to a data signal at a first phase, the data signal capable of oscillating at the first phase or a second phase; and output a first output signal at the first phase and a second output signal at the second phase, the first output signal or the second output signal being utilized in a feedback loop of the low bandwidth phase lock loop. The example apparatus further includes a fast phase change detection circuit coupled to the low bandwidth phase lock loop to determine whether the data signal is oscillating at the first phase or the second phase.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.