Performance improvement by releasing display power for compute bursts
US10732683B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 30, 2018 |
| Grant date | Aug 4, 2020 |
| Priority date | — |
| Expiry date | Oct 31, 2038 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In some embodiments, power may be temporarily removed from a first portion of a computer system (such as a display), and that power redirected to a second portion (such as a processor or System on a Chip), so that extra performance may be obtained from the second portion without exceeding the power budget for the system. If the first portion is a display, the time period of removed power may be short enough that the absence of luminance during that time period will not be noticeable to the human vision system. In a similar embodiment, power may be delivered to the first portion using pulse width modulation, using the time between pulses to redirect power to the other portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.