Method and apparatus of dual threshold clock control
US10732701B1 · kind B1 · utility
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20Claims
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Key dates
| Filing date | Jun 24, 2019 |
| Grant date | Aug 4, 2020 |
| Priority date | — |
| Expiry date | Jun 24, 2039 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Various examples with respect to dual threshold clock control are described. A method involves sensing an input voltage of a processing circuit with a first mechanism and a second mechanism different from the first mechanism. The method also involves regulating a first droop of the input voltage using the first mechanism. The method further involves regulating a subsequent droop of the input voltage after the first droop using the second mechanism.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.