Memory access technology and computer system
US10732876B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 25, 2019 |
| Grant date | Aug 4, 2020 |
| Priority date | — |
| Expiry date | Feb 25, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/067
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory access technology and a computer system, where the computer system includes a memory controller, a media controller, and a non-volatile memory (NVM) coupled to the media controller. After receiving a first read command from the memory controller, the media controller may read first data from the NVM based on a first address in the first read command. Then the media controller transmit, to the memory controller, at least two fixed-length data subblocks and metadata of the at least two data subblocks in response to at least two first send commands received from the memory controller. The metadata includes a location identifier indicating an offset of a corresponding data subblock in the first data. Thus, the memory controller obtains the first data based on the at least two data subblocks and location identifiers in the metadata.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.