Simulation-based code duplication
US10732946B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 16, 2019 |
| Grant date | Aug 4, 2020 |
| Priority date | — |
| Expiry date | May 16, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F8/4435
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for analyzing a program may include generating an initial control flow graph (CFG) for the program, identifying merge blocks of the initial CFG, identifying predecessor-merge pairs based on identifying predecessor blocks for each merge block, simulating a duplication of each predecessor-merge pair, determining whether the duplication satisfies a precondition of each of a collection of optimizations, applying, in response to satisfying the precondition, the optimization to the duplication, and generating a simulation result for the predecessor-merge pair corresponding to the duplication. The simulation result may include the optimization and a benefit of applying the optimization to the duplication. The method may further include duplicating, in the initial CFG, a predecessor-merge pair based on the simulation result corresponding to the predecessor-merge pair.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.