Compensating DC loss in USB 2.0 high speed applications
US10733129B2 · kind B2 · utility
3Cited by
1References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 1, 2018 |
| Grant date | Aug 4, 2020 |
| Priority date | — |
| Expiry date | May 1, 2038 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one embodiment, a current source is coupled to a channel input of a switch, and an output of the switch is coupled to a positive or negative data line in a USB 2.0 communication system. In addition, a first input of the voltage threshold comparator is coupled to the negative data line, a second input of the voltage threshold comparator is coupled to a positive data line, and an output of the voltage threshold comparator is coupled to a control input of the switch.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.