Short-term memory using neuromorphic hardware
US10733500B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 21, 2015 |
| Grant date | Aug 4, 2020 |
| Priority date | — |
| Expiry date | Mar 31, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N3/063
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one embodiment, a system includes one or more electronic neurons and one or more electronic axons. Each neuron is connected to at least one electronic axon via an electronic synapse, and at least one of the one or more electronic neurons is configured to store information in a membrane potential thereof and/or at least one of the one or more electronic axons is configured to store information in an axon delay buffer thereof to act as a memory. In another embodiment, a computer-implemented method includes storing information to a memory comprising electronic neurons and electronic axons. Information is stored in either a membrane potential of at least one of the electronic neurons or in an axon delay buffer of at least one of the electronic axons. Also, each neuron is connected to at least one electronic axon via an electronic synapse.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.