Patent · US Active

Apparatus and method for generating an error concealment signal using power compensation

US10733997B2 · kind B2 · utility

3Cited by

18References

17Claims

0Family size

Assignee

Fraunhofer-Gesellschaft zur förderung der angewandten Forschung e.V. · DE

Inventors

Michael Schnabel · Lauffen am Neckar, DE
Jérémie Lecomte · Santa Clara, US
Ralph Sperschneider · Erlangen, DE
Manuel Jander · Hemhofen, DE

Key dates

Filing date	Jan 24, 2019
Grant date	Aug 4, 2020
Priority date	—
Expiry date	Jan 24, 2039

Classification

Technology area (CPC G)Physics
CPC primaryG10L2019/0016
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

An apparatus for generating an error concealment signal, includes: an LPC representation generator for generating a replacement LPC representation; a gain calculator for calculating a gain information from the LPC representations; a compensator for compensating a gain influence of the replacement LPC representation using the gain information; and an LPC synthesizer for filtering codebook information using the replacement LPC representation to obtain the error concealment signal, wherein the compensator is configured for weighting the codebook information or an LPC synthesis output signal.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.