Patent · US Active

Method of manufacturing a package having a power semiconductor chip

US10734250B2 · kind B2 · utility

1Cited by

13References

21Claims

0Family size

Assignee

Infineon Technologies Austria AG · AT

Inventors

Thomas Basler · Riemerling, DE
Edward Fuergut · Nuremberg, DE
Christian Kasztelan · Munich, DE
Ralf Otremba · Kaufbeuren, DE

Key dates

Filing date	Mar 5, 2019
Grant date	Aug 4, 2020
Priority date	—
Expiry date	Mar 5, 2039

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/181
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A method of manufacturing a semiconductor power package includes: embedding a power semiconductor chip in an encapsulation, the encapsulation forming a housing of the semiconductor power package; and extending a layer of a covering material over at least a part of an outer main surface of the encapsulation. The covering material has a thermal conductivity greater than a thermal conductivity of the material of the encapsulation and/or a temperature stability greater than a temperature stability of the pre-molded chip housing.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.