Chip structure
US10734344B2 · kind B2 · utility
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49Claims
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Assignee
Inventors
Key dates
| Filing date | Jul 10, 2018 |
| Grant date | Aug 4, 2020 |
| Priority date | — |
| Expiry date | Jul 10, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15323
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A chip structure including a chip body and a plurality of conductive bumps. The chip body includes an active surface and a plurality of bump pads disposed on the active surface. The conductive bumps are disposed on the active surface of the chip body and connected to the bump pads respectively, and at least one of the conductive bumps has a trapezoid shape having one pair of parallel sides and one pair of non-parallel sides.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.