Template-based epitaxial growth of lattice mismatched materials on silicon
US10739516B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 31, 2019 |
| Grant date | Aug 11, 2020 |
| Priority date | — |
| Expiry date | May 31, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01S5/3013
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
The embodiments of the present disclosure describe forming a semiconductor layer (e.g., III-V semiconductor material) on a silicon substrate using a template. In one embodiment, the template is patterned to form a plurality of cylindrical openings or pores that expose a portion of the underlying silicon substrate. The material of the semiconductor is disposed into the pores to form individual crystals or monocrystals. Because of the lattice mismatch between the crystalline silicon substrate and the material of the semiconductor layer, the monocrystals may include defects. However, the height of the pores is controlled such that these defects terminate at a sidewall of the template. Thus, the monocrystals can be used to form a single sheet (or single crystal) semiconductor layer above that template that is defect free.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.