Patent · US Active

Re-ordering buffer for a digital multi-processor system with configurable, scalable, distributed job manager

US10740256B2 · kind B2 · utility

0Cited by
5References
20Claims
0Family size

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Key dates

Filing dateMay 23, 2017
Grant dateAug 11, 2020
Priority date
Expiry dateAug 1, 2037

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F9/5083
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method utilizing a system encompassing a free pool buffer; a deadlock avoidance buffer; and a controller communicatively coupled to the free pool buffer and the deadlock avoidance buffer to reorder out-of-order responses to fetch requests into correct order by: receiving a fetch request on behalf of a consumer; allocating space first in the free pool buffer and when such space is not available then allocating space in a division associated with the consumer in the deadlock avoidance buffer. Issuing segment(s) of the fetch request including associated tag(s) to one of one or more memories; writing response data for each of the segment(s) to the allocated space in the free buffer or the deadlock avoidance buffer according to each of the associated tag(s); and transferring the response data to the consumer according to an entry in an ordering first-in, first-out buffer and an entry in a pending request array.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.