Patent · US Active

Self-alignment process for micro light emitting diode using back-side exposure

US10741717B1 · kind B1 · utility

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20Claims
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Key dates

Filing dateMar 18, 2019
Grant dateAug 11, 2020
Priority date
Expiry dateMar 18, 2039

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10H20/825

Abstract

Embodiments relate to a micro light-emitting-diode (μLED) fabricated using a self-aligned process. To fabricate the μLED, a metal layer is deposited on a p-type semiconductor. The p-type semiconductor is on an n-type semiconductor and the n-type semiconductor is on a top side of a substrate. The metal layer is patterned to define a p-metal. The p-type semiconductor is etched using the p-metal as an etch mask. Similarly, the n-type semiconductor is etched using the p-metal and the p-type semiconductor as an etch mask. A negative photoresist layer is deposited over the patterned p-metal and the p-type semiconductor. The negative photoresist is then exposed from the back side of the substrate, thus exposing the regions of the negative photoresist that are not masked by the p-metal. The negative photoresist is then developed to expose the p-metal.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.