Driving circuit and switch signal generation method thereof
US10742112B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 18, 2019 |
| Grant date | Aug 11, 2020 |
| Priority date | — |
| Expiry date | Oct 18, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/20
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A driving circuit and a switch signal generation method are provided. The driving circuit receives a PWM signal and provides a first switch signal and a second switch signal. The driving circuit includes a logical signal circuit, a lower bridge dead time circuit and a lower bridge driving circuit. The logical signal circuit provides a first logical signal and a second logical signal according to the PWM signal. The lower bridge dead time circuit determines a leading edge of a lower bridge dead time signal according to the first logical signal and determines a trailing edge of lower bridge dead time signal according to a trailing edge of first switch signal. The lower bridge driving circuit determines a leading edge of second switch signal according to second logical signal and determines a trailing edge of second switch signal according to the trailing edge of lower bridge dead time signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.