Nested microstrip system and method
US10742171B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 28, 2017 |
| Grant date | Aug 11, 2020 |
| Priority date | — |
| Expiry date | Nov 28, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10166
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Nested microstrip systems and methods, and systems and methods encompassing same, are disclosed herein. In one example, a nested microstrip system includes a printed circuit board (PCB) having first and second layer levels, where first and second conductive traces are positioned at the second layer level. The first conductive trace is configured to include an orifice, and to extend between first and second locations along a first path, and the second conductive trace is positioned within the orifice. A non-conductive gap portion of the orifice exists between the first and second conductive traces so that the second conductive trace is electrically isolated from the first conductive trace. One or more first electromagnetic signals can be propagated along a first part of the first conductive trace, and one or more second electromagnetic signals can be propagated along at least a second part of the second conductive trace.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.