Programmable modular frequency divider
US10742219B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 30, 2019 |
| Grant date | Aug 11, 2020 |
| Priority date | — |
| Expiry date | Apr 30, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K23/667
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A frequency divider includes a circuit that receives an input clock signal having a period T on an input port thereof and generates an output clock signal on an output port thereof having a period MT in response to a control signal specifying M is disclosed. Here, M is a positive integer and all transitions between logical one and logical zero in the output clock signal occur at integer multiples of T. In one embodiment, the circuit includes a module string having characterized by N identical modules connected in series to form a string of modules. Each module is configured such that when the clock signal having period T is input to the first module, the output clock signal having a period of MT is output from the last module, where M can have any value between one and a maximum number that depends on N.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.