Interposer systems for information handling systems
US10747702B2 · kind B2 · utility
1Cited by
2References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 31, 2018 |
| Grant date | Aug 18, 2020 |
| Priority date | — |
| Expiry date | Nov 11, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2213/0026
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computing apparatus including a printed circuit board (PCB) including a first central processing unit (CPU) socket and additional CPU socket(s); a CPU coupled to the first CPU socket; a base interposer coupled to the additional CPU socket(s); and one or more devices connected to the base interposer, wherein the base interposer provides a connection between the CPU and the one or more devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.