Gate driving circuit and display device having the same
US10748471B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 27, 2018 |
| Grant date | Aug 18, 2020 |
| Priority date | — |
| Expiry date | Dec 27, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/08
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A gate driving circuit comprising stages cascade-connected with each other and configured to output gate signals, a stage of the stages including a pull-up circuit configured to output a high voltage of a clock signal as a high voltage of a gate signal in response to a bootstrap voltage of a control node in a period of a frame period, a first discharging circuit configured to discharge a voltage of the control node to a first low voltage in response to a carry signal of at least one stage of the plurality of stages that is subsequent to the stage, and a second discharging circuit configured to discharge a voltage of the control node to a second low voltage being lower than the first low voltage in response to a carry signal of at least one stage of the plurality of stages that is subsequent to the stage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.