Semiconductor structure including inter-layer dielectric
US10748809B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Jan 7, 2019 |
| Grant date | Aug 18, 2020 |
| Priority date | — |
| Expiry date | Jan 7, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/26586
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor structure includes a gate structure over a substrate. The semiconductor structure includes an inter-layer dielectric (ILD) over the substrate, wherein an upper portion of the ILD has a higher concentration of silicon atoms than a bottom portion of the ILD.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.