Patent · US Active

Metallisation for semiconductor device

US10748847B2 · kind B2 · utility

1Cited by
7References
15Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 9, 2015
Grant dateAug 18, 2020
Priority date
Expiry dateSep 9, 2035

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2224/13147
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

The present disclosure relates to a semiconductor device comprising a metallisation stack. The metallisation stack may include a first metallisation layer and a second metallisation layer. The first metallisation layer may be electrically connected to the second metallisation layer by a two or more stacked inter-metal vias.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.