Insulating layer structure for semiconductor product, and preparation method of insulating layer structure
US10748989B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 7, 2018 |
| Grant date | Aug 18, 2020 |
| Priority date | — |
| Expiry date | Dec 7, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/66
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An insulating layer structure for a semiconductor product. The insulating layer structure includes a device substrate, a supporting substrate and a thin film layer. The device substrate and the supporting substrate are silicon wafers. The thin film layer(s) is/are arranged on the device substrate or/and the supporting substrate. The device substrate and the supporting substrate are bonded together through the thin film layer arranged on at least one of the device substrate and the supporting substrate to form an integral multilayer SOI structure. The insulating layer structure formed by the present invention solves problems of serious spontaneous heating of an existing SOI device, severe warpage of an existing SOI structure caused by high-temperature annealing, a poor radio frequency characteristic and the like, and has a predictable relatively higher economic and social value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.