Methods and apparatus related to termination regions of a semiconductor device
US10749027B2 · kind B2 · utility
1Cited by
9References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 28, 2018 |
| Grant date | Aug 18, 2020 |
| Priority date | — |
| Expiry date | Dec 28, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/514
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In one general aspect, an apparatus can include a semiconductor region, and a trench defined within the semiconductor region. The trench can have a depth aligned along a vertical axis and have a length aligned along a longitudinal axis orthogonal to the vertical axis. The trench can have a first portion of the length included in a termination region of the semiconductor region and can have a second portion of the length included in an active region of the semiconductor region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.