Patent · US Active

Local interconnect network bus architecture

US10749706B2 · kind B2 · utility

0Cited by
5References
14Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 14, 2017
Grant dateAug 18, 2020
Priority date
Expiry dateJun 14, 2037

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH05B47/18
  • WIPO fieldDigital communication
  • WIPO sectorElectrical engineering

Abstract

The present invention relates to an integrated circuit device for controlling LIN slave nodes based on a control signal transmitted by a LIN master control device. The IC device comprises a slave node circuit for processing the control signal when received in the form of a LIN message frame via a first data line terminal. The IC device also comprises a master node circuit for processing further control signals to be transmitted in the form of LIN message frames via a second data line terminal to the LIN slave nodes. The IC device also comprises a processing unit for controlling the LIN slave nodes based on the control signal by composing the further control signals.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.