Patent · US Active

Techniques to manage cache resource allocations for a processor cache

US10754783B2 · kind B2 · utility

0Cited by
2References
19Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 29, 2018
Grant dateAug 25, 2020
Priority date
Expiry dateJun 29, 2038

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/604
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Examples include techniques to manage cache resource allocations associated with one or more cache class of service (CLOS) assignments for a processor cache. Examples include flushing portions of an allocated cache resource responsive to reassignments of CLOS.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.